Three-dimensional (3D) packaging technologies—particularly through-silicon vias (TSVs)—are essential for achieving higher performance in advanced semiconductor devices. From high-performance computing (HPC) and mobile applications to emerging AI and edge devices, TSVs support faster interconnects, smaller footprints, and improved energy efficiency.
As the semiconductor industry continues to scale vertically, the need for precise, high-speed, and low-damage processing of TSV structures becomes increasingly critical.
TSV structures introduce unique demands on equipment performance and process control. Key challenges include:
Etch speed and uniformity:
TSVs often require deep, high-aspect-ratio vias that must be etched through silicon with both speed and consistency. Throughput is essential, especially for volume manufacturing.
Process choice:
Bosch vs. non-Bosch Process: While both techniques are used, the Bosch process offers superior sidewall protection and etch control for deep structures—making it a preferred option for TSV fabrication in many applications.
Thermal budget limitations:
Subsequent bonding or metallization steps often require low thermal budgets. This necessitates dielectric deposition processes that maintain film quality at lower temperatures.
Profile control and residue minimization:
Minimizing scalloping, bowing, and polymer buildup is critical to maintain electrical and structural integrity.
SPT provides specialized Si DRIE and PECVD systems engineered to meet the precision, throughput, and reliability requirements of advanced Advanced packaging.
High-speed silicon etching using the Bosch process
Excellent sidewall protection with minimal scalloping
Stable performance over deep vias and thick substrates
High-quality SiO₂ and SiN films at reduced thermal budgets
Precise thickness and stress control for interlayer dielectrics
Ideal for TSV insulation and passivation steps