From accelerometers in smartphones and inertial sensors in autonomous vehicles to biomedical devices, MEMS devices support the infrastructure of modern society. At the same time, MEMS manufacturing processes involve many unique technical challenges that differ from those encountered in memory and logic semiconductor manufacturing, making decisions regarding process design and equipment selection far from straightforward. This article provides an overview of the entire MEMS device manufacturing process, the technical challenges facing the industry, and key considerations for mass production, centered on the basic flow of silicon micromachining. 

MEMS (Micro-Electro-Mechanical Systems) is a technology that uses silicon micromachining techniques to densely integrate sensors, actuators, and electronic circuits on a single silicon substrate. MEMS is used in a wide range of applications, from ultra-compact microphones installed in smartphones and headphones to high-precision inertial sensors that stabilize industrial antennas, automotive sensors supporting autonomous driving, game consoles, drones, and navigation assistance systems. （Source：Edge AI and Vision Alliance）。

Following the inventory adjustment period after the COVID-19 pandemic, the global MEMS market is now entering the “post-inventory growth era.” Global MEMS market revenue reached USD 15.4 billion in 2024, representing stable year-on-year growth of 5%. The market is projected to expand to USD 19.2 billion by 2030, with a compound annual growth rate (CAGR) of 3.7% expected between 2024 and 2030. （Source：Yole Group『Status of the MEMS Industry 2025』）。

In recent years, demand for smaller size, greater energy efficiency, and lower costs has increased as IoT has matured. At the same time, next-generation fields such as BioMEMS and piezoelectric MEMS have also experienced rapid growth. 

In the MEMS device manufacturing flow, one of the most technically challenging processes is deep silicon etching, referred to as DRIE (Deep Reactive Ion Etching), DSiE (Deep Silicon Etching), or Si DRIE (Silicon Deep Reactive Ion Etching). This process forms microstructures with a high aspect ratio—that is, a large ratio of depth to width—in a silicon substrate. The industry primarily employs two distinct technological approaches. 

Developed by Germany’s Robert Bosch GmbH, the Bosch process has become the de facto industry standard for MEMS manufacturing. It achieves deep, vertical silicon etching by rapidly repeating isotropic etching steps using fluorine-based gases such as sulfur hexafluoride (SF₆) and sidewall protection film (passivation) deposition steps using fluorocarbon-based plasma such as octafluorocyclobutane (C₄F₈), with each cycle lasting from several seconds to several tens of milliseconds. 

 Its main features include: 

• High selectivity and high etch rates for photoresist and oxide masks

• Suitability for forming deep structures such as through-silicon vias (TSVs) and microfluidic channels

• Formation of wave-like roughness, known as “scalloping,” on the sidewalls

• Use of inductively coupled plasma (ICP) equipment, which is essential for generating high-density plasma

The cryogenic process controls the reaction by cooling the wafer to approximately −100°C to −120°C. Unlike the Bosch process, it does not deposit a polymer-based protective film, thereby preventing scalloping and enabling the formation of exceptionally smooth sidewalls. This process is suitable for forming nanoscale microstructures and fabricating molds for fine pattern transfer, such as micromolds. Because it operates at low temperatures and with a low bias voltage, it also offers the advantage of reducing mask material consumption. 

As pattern dimensions become smaller during dry etching, the etch rate may decrease significantly. This phenomenon, known as the “microloading effect” or “aspect ratio–dependent etching (ARDE),” occurs when the arrival of reactive species and the removal of reaction byproducts are hindered by pattern density and opening width. In MEMS devices containing structures of different sizes, ensuring uniform etch depth across the wafer becomes extremely challenging. （Source：SEMI-NET）

In the release process, which frees movable structures such as accelerometer and microphone components from the substrate, wet etching using an aqueous hydrofluoric acid (HF) solution has traditionally been employed to remove the sacrificial layer, typically a silicon oxide layer. However, during rinsing and drying, the surface tension of the liquid can cause movable structures to adhere to one another. This phenomenon, known as stiction, can drastically reduce yield and has become a critical issue. 

 As a solution, gas-phase (dry) processes that eliminate the use of aqueous solutions are receiving increasing attention. 

• Anhydrous HF vapor etching (Vapor HF)：Uses only trace amounts of moisture as a catalyst under low-pressure conditions to achieve completely stiction-free structural release

• Xenon difluoride (XeF₂) etching：Selectively etches silicon without damaging packaging materials or dicing frames, enabling the release process to be postponed until after dicing or even wire bonding, thereby improving yield

During deep etching of SOI (Silicon on Insulator) wafers, which are commonly used for accelerometers and other devices, a phenomenon known as “notching” can occur when the etch reaches the BOX layer (buried oxide layer). The repulsive force of ions accumulated in the insulating layer causes the lower portions of the sidewalls to be etched laterally.

Because notching can significantly impair the mechanical strength and resonance characteristics of MEMS structures, precise control is required when the etch reaches the interface.

The true value of MEMS manufacturing lies in whether processes established during research and prototyping can be transferred directly to high-volume manufacturing (HVM) lines. In light of the challenges discussed in this article, the following three areas are particularly important for mass production: 

1. Notch-free SOI processing: Precise control that prevents notching at the BOX-layer interface, even under over-etch conditions

2. Dry sacrificial-layer etching: A release process that completely avoids stiction by eliminating aqueous solutions

3. Multi-chamber platforms: Continuous processing without exposing wafers to the atmosphere, maximizing productivity per unit footprint

SPP Technologies holds a 90% share of the Japanese market for silicon deep etching equipment for MEMS. In 1995, the company acquired STS—now KLA–SPTS—which had jointly developed the Bosch process with Robert Bosch GmbH. Since shipping the world’s first Bosch-process-compatible silicon deep etching equipment, SPP Technologies has established itself as the de facto standard in the field of deep silicon etching for MEMS. The company provides technology solutions directly linked to high-volume manufacturing yield, including stiction-free release processes enabled by its dry sacrificial-layer etching equipment, Vetelgeuse.

 The key points of this article are summarized below: 

• Silicon micromachining is at the core of MEMS device manufacturing, with DRIE being the most technically challenging process.

• The two major etching technologies are the Bosch process and the cryogenic process, which are selected according to the application.

• The industry’s key technical challenges center on three areas: ARDE, stiction, and SOI notching.

• Mass production requires an integrated process design that encompasses not only etching performance but also dry release and multi-chamber processing.